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The graph of Fig. 23-5 shows ID as a function of EG for a hypothetical N-channel JFET. The drain voltage, ED, is assumed to be constant. When EG is fairly large and negative, the JFET is pinched off, and no current flows through the channel. As EG gets less negative, the channel opens up, and ID begins flowing. As EG gets still less negative, the channel gets wider and ID increases. As EG approaches the point where the S-G junction is at forward breakover, the channel conducts as well as it possibly can. If EG becomes positive enough so the S-G junction conducts, some of the current in the channel leaks out through the gate. This is usually an unwanted phenomenon.

At the instant a power supply is switched on, a sudden current surge occurs, even with no load at the output. This is because the filter capacitor(s) need an initial charge, and they draw a lot of current for a short time. The surge current is far greater than the operating current. This can destroy the rectifier diodes. The phenomenon is worst in high-voltage supplies and voltage-multiplier circuits. Diode failure can be prevented in at least four different ways. The first method uses brute force. You can simply use diodes with a current rating of many times the operating level. The main disadvantage is cost. High-voltage, high-current diodes can get expensive. A second method involves connecting several units in parallel wherever a diode is called for in the circuit. This is actually a variation on the first method. The overall cost might be less. Current-equalizing resistors are necessary. A third scheme for surge protection is to apply the input voltage little by little. A variable transformer, called a Variac, is useful for this. You start at zero input and turn a knob to get up to the full voltage. This can completely get rid of the current surge. A fourth way to limit the current surge is to use an automatic switching circuit in the transformer primary. This applies a reduced ac voltage for a second or two, and then switches in the full input voltage. Which of these methods is best It depends on the overall cost, the operating convenience, and the whim of the design engineer.

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The ac on the utility line is a sine wave with a constant rms voltage near 117 V. But there are spikes, known as transients, lasting microseconds or milliseconds, that attain peak values of several hundred or even several thousand volts. Transients are caused by sudden changes in the load in a utility circuit. Lightning can also produce them. Unless they are suppressed, they can destroy the diodes in a power supply. Transients can also befuddle the operation of sensitive equipment like personal computers. The simplest way to get rid of most transients is to place a capacitor of about 0.01 F, rated for 600 V or more, across the transformer primary (Fig. 21-13). Commercially made transient suppressors are also available. In the event of a thunderstorm locally, the best way to protect equipment is to unplug it from the wall outlet. This is inconvenient, of course. But if you have a personal computer, hi-fi set, or other electronic appliance that you like a lot, it s not a bad idea.

The FET Amplifies Voltage The best amplification for weak signals is obtained when EG is such that the slope of the curve in Fig. 23-5 is the greatest. This is shown roughly by the range marked X. For power amplification, however, results are often best when the JFET is biased at or beyond pinchoff, in the range marked Y. In either circuit shown in Fig. 23-4, ID passes through the drain resistor. Small fluctuations in EG cause large changes in ID, and these variations in turn produce wide swings in the dc voltage across R3 (in the circuit at A) or R 4 (in the circuit at B). The ac part of this voltage goes through capacitor C2, and appears at the output as a signal of much greater ac voltage than that of the input signal at the gate. Drain Current versus Drain Voltage Do you suspect that the current ID, passing through the channel of a JFET, increases in a linear manner with increasing drain voltage ED This seems reasonable, but it is not what usually happens. Instead, ID rises for awhile as ED increases steadily, and then ID starts to level off. The current ID can be plotted graphically as a function of ED for various values of EG. When this is done, the result is a family of characteristic curves for the JFET. The graph of Fig. 23-6 shows a family of characteristic

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